1. Field of the Invention
The present invention relates to a semiconductor device having an inner active region which includes a first electronic circuit formed inside a bonding pad for assembly and an outer active region which includes a second electronic circuit formed outside the boding pad for assembly.
2. Description of the Related Art
FIG. 6 is a plan view to show a configuration of a semiconductor device in the prior art. In FIG. 6 is shown a state where the semiconductor device is mounted on the die pad (not shown) of a lead frame and where bonding pads for assembly are connected to the leads of a lead frame by bonding wires. In FIG. 6, a reference numeral 101 denotes a semiconductor device; a reference numeral 102 denotes a rectangular semiconductor substrate; a reference numeral 103 denotes an inner active region including a first electronic circuit (not shown), which is formed in the central region of the semiconductor substrate 102 and has a predetermined function; a reference numeral 104 denotes an outer active region including the second electronic circuit (not shown), which is formed outside the semiconductor substrate 102 and has a predetermined function; a reference numeral 105 denotes an opposing region where the inner active region 103 is opposed to the outer active region 104; a reference numeral 106 denotes a bonding pad for assembly formed along the outer periphery of the inner active region 103; a reference numeral 106a denotes the bonding pad for assembly formed inside the opposing region 105; a reference numeral 106b denotes the bonding pad for assembly formed outside the opposing region 105.
A reference numeral 111 denotes a lead of a lead frame; and a reference numeral 112 denotes a bonding wire for connecting the bonding pad 106 for assembly to the lead 111.
In this manner, the semiconductor device 101 which is mounted on the die pad (not shown) of the lead frame and in which the bonding pads 106 for assembly are connected to the leads 111 of the lead frame by the bonding wires 112 is usually sealed with resin in this state and is set in a package.
Next, a conventional failure analysis method of a semiconductor device will be described. In the first place, in the state where the semiconductor is set in a package, the semiconductor device is inspected for electric characteristics to make sure a failed region.
Then, the package is opened to expose the surface of the semiconductor device. Then, in the same electric state as in the above mentioned inspection of electric characteristics, a failed point is narrowed down in a failed region by the use of an analyzing unit such as an optical microscope, an emission microscope, and an electron beam tester. The semiconductor device is visually checked for an abnormality from appearance by the optical microscope and then is inspected for an abnormal light emitting point by the emission microscope. If any abnormal point is not found even by these inspection, a wiring is inspected for an abnormal potential by the electron beam tester. In this manner, the failed point is narrowed down.
Thereafter, the minute failed point narrowed down in this manner is examined in detail by a physical analysis method to diagnose the cause of the failure.
Since the semiconductor device 101 in the prior art is constituted in the above manner, and the bonding wires 112 connected to the bonding pads 106a for assembly formed in the opposing region 105 where the inner active region 103 is opposed to the outer active region 104 pass over the outer active region 104. Therefore, according to the failure analysis method in the prior art, it is difficult to diagnose the cause of the failure by the use of the optical microscope, the emission microscope, and the electron beam tester and thus is impossible to narrow down the failed point.
The present invention has been made to solve the above mentioned problem. It is the object of the present invention to provide a semiconductor device in which a failed point can be easily narrowed down and which has an inner active region including the first electronic circuit formed inside assembly bonding pads and an outer active region including the second electronic circuit formed outside the assembly bonding pads.
A semiconductor device in accordance with the present invention includes: an inner active region including a first electronic circuit formed on the semiconductor substrate; an outer active region positioned between the edge of the semiconductor substrate and the inner active region and including a second electronic circuit formed on the semiconductor substrate; a main bonding pad formed inside an opposing region where the inner active region is opposed to the outer active region and along the outer periphery of the inner active region; a sub-bonding pad formed outside the region where the inner active region is opposed to the outer active region; and a pad-to-pad interconnection wiring for connecting the main bonding pad to the sub-bonding pad. By this arrangement it is possible to produce an effect that before the narrowing down of the failed point in the failed region in the outer active region, by removing the bonding wire passing over the failed region from the main bonding pad for assembly and by bonding the bonding wire removed from the main bonding pad for assembly to the sub-bonding pad for analysis connected to the main bonding pad for assembly to which the bonding wire has been bonded via the pad-to-pad interconnection wiring, the failed point can be narrowed down by the use of the analyzing unit such as the optical microscope, the emission microscope and the electron beam tester.
A semiconductor device in accordance with the present invention includes: an inner active region including a first electronic circuit formed on the semiconductor substrate; an outer active region positioned between the edge of the semiconductor substrate and the inner active region and including a second electronic circuit formed on the semiconductor substrate; a plurality of main bonding pad formed inside an opposing region where the inner active region is opposed to the outer active region and along the outer periphery of the inner active region; a sub-bonding pad formed outside the region where the inner active region is opposed to the outer active region; and a pad-to-pad interconnection wiring for electrically connecting any one of the main bonding pad to the sub-bonding pad. By this arrangement it is possible to produce an effect that before the narrowing down of the failed point in the failed region in the outer active region, by removing the bonding wire passing over the failed region from the main bonding pad for assembly and by bonding the bonding wire removed from the main bonding pad for assembly to the sub-bonding pad for analysis and by electrically connecting the main bonding pad for assembly from which the bonding wire is removed to the sub-bonding pad for analysis, the failed point can be narrowed down by the use of the analyzing unit such as the optical microscope, the emission microscope and the electron beam tester.
A semiconductor device in accordance with the present invention includes: an inner active region including a first electronic circuit formed on the semiconductor substrate; an outer active region positioned between the edge of the semiconductor substrate and the inner active region and including a second electronic circuit formed on the semiconductor substrate; a main bonding pad formed inside an opposing region where the inner active region is opposed to the outer active region and along the outer periphery of the inner active region; a circuit-to-circuit interconnection wiring for connecting the first electronic circuit to the second electronic circuit; and a scan register provided in the circuit-to-circuit interconnection wiring. By this arrangement it is possible to produce an effect that before the narrowing down of the failed point in the failed region in the active region, by removing the bonding wire passing over the failed region from the main bonding pad for assembly and by setting the respective scan registers at the state of xe2x80x9c0xe2x80x9d (GND level) or the state of xe2x80x9c1xe2x80x9d (power source level) such that the signal applied to the outer active region via the circuit-to-circuit interconnection wiring is made equal to the signal applied to the outer active region from the inner active region via the circuit-to-circuit interconnection wiring when the semiconductor device is inspected for the electric characteristics in the state where the semiconductor device is set in a package, the failed point can be narrowed down by the use of the analyzing unit such as the optical microscope, the emission microscope and the electron beam tester.